The present invention relates generally to an interface integrated circuit for data communication, and more particularly to a current mode step attenuation control circuit with digital technology.
Voltage attenuation control has an important role in signal processing circuit with Digital Signal Process (DSP) as a kernel. At a signal input, when the signal amplitude is too large and modulation attenuation occurs, amplitude limit distortion will be lowered and accuracy of signal processing will be raised. At signal output, when signal amplitude is too large, attenuation will lower interference to adjacent channel and raise the whole system performance. Referring to FIG. 1, a conventional voltage attenuation circuit is consisted of one operational amplifier and two variable resistors, wherein Vin is an input voltage signal, Vbias is a DC bias voltage, Vout is an output voltage signal and variable resistors R1 and R2 are used to adjust gain. Suppose signal Vin has an AC component (VAC) and a DC component (VDC), and the VDC equals to a bias voltage of the operational amplifier, then the operational amplifier is an ideal amplifier and there is a formula       V    out    =                    (                              V            bias                    -                      V            in                          )            ⁢              xe2x80x83            ⁢              R1        R2              =                            (                                    V              DC                        -                          V              DC                        -                          V              AC                                )                ⁢                  xe2x80x83                ⁢                  R1          R1                    =                        -                      V            AC                          ⁢                  xe2x80x83                ⁢                  R1          R2                    
It can be seen from the formula above that output voltage has a linear relationship with resistance ratio of variable resistors R1 and R2, but the polarity is opposite to the input signal. By changing resistance of R1 and R2, step voltage attenuation control can be implemented. In general, changing R2 resistance is an easier way to attenuate by digital signal control, but when attenuation amplitude is large, connected larger resistance R2 will cause larger noise. In this attenuation circuit which is consisted of resistors, some elements, such as MOS switch etc., work at nonlinear zone and there are conducting resistances, so the attenuation circuit must have larger resistance of R2, otherwise control accuracy is worse. As there are larger resistances, the attenuation circuit cannot be integrated by standard digital integrated circuit technology.
Another weakness of the attenuation circuit is that in a single power supply system, such as a single-positive power supply, the bias voltage setting is limited. In the formula Vbias greater than abs(Vin)+K, wherein function abs means taking a variable absolute value, K is the minimum setting value of DC bias voltage which is limited by output amplitude range of the operational amplifier. When two inputs of the operational amplifier are equal, output should be zero. Nevertheless, if output amplitude range is 0.5V . . . VCCxe2x88x920.5(V), when two inputs are equal, according to attenuation setting the output should be 0.5V. Otherwise, in certain signal input range, output will have larger distortion, which comes from non-ideal working state of the operational amplifier.
The output of the attenuation circuit only have AC signal and partial DC component, so it cannot provide DC working point for successive circuit, i.e. it cannot be directly coupled with successive circuit. In order to provide ideal DC working point and to implement direct couple, a differential operational amplifier is used in general, which uses Common Mode Feed Back (CMFB) circuit to create DC working point for successive circuit. FIG. 2 shows a step attenuation circuit controlled by 5 bits digital signal.
In FIG. 2, VinP and VinN are two complement input voltage signals, VoutP and VoutN are two complement output voltage signals too, b0xcx9cb4 are five levels digital signal for step attenuation control. The 2 to 4 decoder decodes 2 Most Signification Bits (2MSB) of the digital signal. The outputs of 2 to 4 decoder are IN0xcx9cIN3 which control cut-in or cut-off of full differential operational amplifier input switches: SW1P and SW1N, SW2P and SW2N, SW3P and SW3N, SW4P and SW4N, respectively. The 3 to 8 decoder decodes 3 Lowest Signification Bits (3LSB) of the digital signal. The outputs of 3 to 8 decoder are OUT0, OUT1, . . . OUT7 which control cut-in and cut-off of full differential operational amplifier output switches: SWO1P and SWO1N, SWO2P and SWO2N, . . . SWO7P and SWO7N, SWO8P and SWO8N, respectively. The VDC is a needed DC component of output differential signal, CMFBin is the input of CMFB, and CMFBout is the output of CMFB.
The voltage attenuation control in circuit above is in segment, i.e. with 2MSB decoder, the control is divided into four segments and each 8 DB is a control segment. When a digital control signal input is b4b3b2b1b0=00000; in input part, switches SW1P and SW1N are cut off and others are cut in, so resistances R1P and R1N are cut in and other resistances are all shorted; in output part, all switches are cut off and all resistances are cut in; at this time voltage attenuation is 0 DB, the output is       V    outP    =                    -                  V          inN                    *                                    ∑                          m              =              1                                      m              =              8                                ⁢                      xe2x80x83                    ⁢                                    RO              ⁡                              (                m                )                                      ⁢            P                          R1N            ⁢              xe2x80x83            ⁢              V        outN              =                  -                  V          inP                    *                                    ∑                          m              =              1                                      m              =              8                                ⁢                      xe2x80x83                    ⁢                                    RO              ⁡                              (                m                )                                      ⁢            N                          R1P            
In these two formulas, when all cuts (decreasing) in resistances in output equal to cutting in resistances in input, then attenuation is 0 DB, but signal polarity is opposite. When keeping 2MSB unchanged, but b2b1b0 has been changed from 000 to 111, cutting in resistances, in input, have been kept unchanged and cutting in resistances, in output, have been changed from 8 items to 1 item. The attenuation is changed from 0 DB to xe2x88x927 DB. When 2MSB has been changed from 00 to 11 one by one, in input, cutting in resistances have been changed from 1 item to 4 items, and four segments of control are sequentially performed.
The numerical expressions corresponding to a digital control signal is
m=2*b4+b3
n=4*b2+2*b1+b0
For different inputs of a digital control signal, the attenuation is             V      outP              V      inN        =                    -                  xe2x80x83                ⁢                                            ∑                              K                =                1                                            K                =                                  8                  -                  n                                                      ⁢                          xe2x80x83                        ⁢                                          RO                ⁢                                  (                  K                  )                                            ⁢              P                                                          ∑                              L                =                0                                            L                =                m                                      ⁢                          xe2x80x83                        ⁢                                          R                ⁢                                  (                                      1                    +                    L                                    )                                            ⁢              N                                          ⁢              xe2x80x83            ⁢                        V          outN                          V          inP                      =          -              xe2x80x83            ⁢                                    ∑                          K              =              1                                      K              =                              8                -                n                                              ⁢                      xe2x80x83                    ⁢                                    RO              ⁢                              (                K                )                                      ⁢            N                                                ∑                          L              =              0                                      L              =              m                                ⁢                      xe2x80x83                    ⁢                                    R              ⁢                              (                                  1                  +                  L                                )                                      ⁢            P                              
Wherein m is a decimal number corresponding to 2MSB of a binary digital control signal, and n is a decimal number corresponding to 3LSB of a binary digital control signal. A calculated number n is used in attenuation calculation formulas to sum the corresponding cut in resistances in numerator and denominator.
It can be seen from the analysis above that a whole circuit voltage attenuation can be calculated as follow. First, calculate decimal number m and n with a digital control signal input. Then, sum resistances of cut in circuits to obtain input summed resistance and output summed resistance of a cut in circuit. Finally, with the attenuation calculating formulas mention above calculate voltage attenuation of corresponding digital control signal.
MOS switch has a conducting resistance, said above, when considering switch conducting resistance, control accuracy of voltage attenuation will be affected. Taking 0 DB attenuation as an example, after considering the conducting resistance effect of MOS switch, a real attenuation is             V      outP              V      inN        =                    -                  xe2x80x83                ⁢                                            ∑                              m                =                1                                            m                =                8                                      ⁢                          xe2x80x83                        ⁢                                          RO                ⁢                                  (                  m                  )                                            ⁢              P                                                          3              *                              R                                  SW                  ⁢                                      (                    ON                    )                                                                        +            R1N                              ⁢              xe2x80x83            ⁢                        V          outN                          V          inP                      =          -              xe2x80x83            ⁢                                    ∑                          m              =              1                                      m              =              8                                ⁢                      xe2x80x83                    ⁢                                    RO              ⁢                              (                m                )                                      ⁢            N                                                3            *                          R                              SW                ⁢                                  (                  ON                  )                                                              +          R1P                    
In the formulas above, numerator is a total output resistance of cut in circuits and denominator is a total input resistance of cut in circuits. The attenuation calculating formula is similar as above, the only difference is by considering the MOS switch conducting resistance effect in the acting on input circuit resistance. When an output switch is also cut in the circuit, switch conducting resistance effect is also considered in corresponding numerator items. Because, at output, switches are parallel cut in, at most only one switch conducting resistance effect is considered, but, at input, switches are serially cut in, so at most it should consider conducting resistance effect for three switches.
In the circuit above, attenuation can be gradually increased in an equal step length for DB value, but for resistance of a cut-in circuit corresponding to the increasing DB value, the resistance is increased in an irregular way. Consequently, for twelve resistances in a cut-in circuit, each one has a different increased resistance. In resistance match, if ratio of two matched resistances is a integer, especially 1, 2, 4, 8, . . . , the match performance are best. Therefore, for resistances match in a circuit, if there is a resistance match with non-integer proportional relationship, then implementation of layout is very difficult. Table 1 shows relationship between DB attenuation and real attenuation multiple.
When attenuation is xe2x88x921 DB, a resistance to be shorted is
RO8N(P)=(1.0xe2x88x920.891)*R1P(N)=0.109R1P(N).
When attenuation is xe2x88x922 DB, a resistance to be shorted is
RO7N(P)=(0.891xe2x88x920.794)*R1P(N)=0.097R1P(N).
It is seen from analysis above, for equal DB step length attenuation, corresponding resistance varies are irregular, so resistance match is very difficult. Because cut in resistances in input are different for four segments, attenuation circuit designed with the method above can only have control accuracy of xc2x130%.
The invention provides a current mode step attenuation control circuit, which is suitable for Application Specific Integrated Circuit (ASIC) manufacturing technology and has high control accuracy. It takes advantage of large digital integrated circuit technology for digital communication interface, based on DSP.
A current mode step attenuation control circuit comprises several stages of current attenuation circuits connected serially. Each stage of the current attenuation circuit has a digital control input, a common mode feedback signal input and a bias input which are connected to a digital control signal, a common mode feedback current and a bias voltage, respectively. An analog input signal is connected to input of the first stage current attenuation circuit. The circuit attenuation stage design is based on binary weighted match. The step length is set according to necessity, and the attenuation is directly controlled by a digital signal, i.e. it implements current mode step attenuation control without any decoder circuit.
The invention changes conventional voltage attenuation control to current attenuation control to solve step attenuation problem, which depends on resistances match in convention. The invention utilizes MOS transistor conducting resistance to form an equivalent resistance or current source match to control attenuation. By using transistor match to implement attenuation control, it eliminates thoroughly dependence on resistance match. It has advantages of high transmission speed, small phase delay, high control accuracy and compatible with digital integrated circuit technology. The current mode step attenuation control circuit can be integrated with DSP circuit in one chip to lower system cost and raise system reliability.
In conventional voltage attenuation mode, when voltage attenuation is different, influence and requirement for operational amplifier is different, in this case it is necessary to use different compensating technology, such as internal compensating capacitor with different values for different attenuation. In a circuit of the invention, because it is a current mode, requirement to operational amplifier is greatly decreased, so circuit design is simplified. Influence of conducting resistance of switches on attenuation control accuracy is effectively suppressed. From theoretical point of view, influence of a switch conducting resistance on attenuation accuracy can be neglected, so control accuracy is greatly increased.
The step attenuation control circuit includes several current attenuation stages. Design of attenuation stages is based on binary weighted match. Therefore, digital signal controls attenuation directly without assistance of any decoder circuit, and design complexity of the circuit is greatly simplified.